Total solution for standard cell & I/O library, and memory IP characterization by Legend's tools

To identify ‘easy-to-break’ parts of .Lib model, Model Diagnoser can quickly diagnose entire library and quantitatively report the inside-cell glitch/metastability/functional problems.

SANTA CLARA, Calif. -- May 27, 2008 – Legend Design Technology, Inc. today announced the release of CharFlo-Cell!, a next-generation cell library characterization tool, and Model Diagnoser, a cell library verification tool for incoming quality assurance.  With its industry-proven memory IP characterization tool CharFlo-Memory!, Legend has provided a total solution for memory IP, standard cell & I/O library characterization and verification in SoC designs.

CharFlo-Cell! is an automatic standard cell & I/O library characterization tool, designed for reliability and manufacturability aware. Traditional tools characterize the cells based on the measurement of pins but without looking into inside-cell for reliability issues such as glitch/metastability. As a result, the cell library could have easy-to-break models and SoC design would get low yields. The newly released CharFlo-Cell! with patented multi-goals bi-section technology, can fully prevent reliability problems and ensure design success.

Model Diagnoser is designed to diagnose the .Lib models of cell library, and to identify all ‘function failure’ parts and  ‘easy-to-break’ parts (e.g. glitch/metastability). The tool can analyze the inside-cell to locate high-risk spots, simulate those spots, and report the problems quantitatively (e.g. glitch over 42% of Vdd). Usually, those problems are caused by the .Lib models incorrectly characterized.

CharFlo-Memory!, Legend’s memory IP characterization tool, has successfully been used in production by major foundries, IDM and fabless design companies for years. With the advantages of high throughputs and silicon accuracy, CharFlo-Memory! enables engineers to automatically generate on-chip memory instance models at any PVT.

“Accurate modeling of library IPs is very critical for the success of deep-submicron and nanometer SoC designs” said Dr. You-Pang Wei, president and CEO of Legend Design Technology. “With the newly released CharFlo-Cell! and Model Diagnoser, Legend has provided a complete solution of characterization and verification for memory IP, standard cell and I/O library. As for the simulation solution, Legend offers both MSIM (a high-accuracy SPICE simulator) and Turbo-MSIM (a full-chip Fast-Spice simulator) to deliver excellent quality and price-performance.”

At DAC 2008, Legend will demonstrate CharFlo-Cell!, Model Diagnoser, CharFlo-Memory!, MSIM and Turbo-MSIM at Booth #1733. Those products are all immediately available.

About Legend
Legend Design Technology Inc. is a leading provider of circuit simulation and semiconductor IP library characterization software for SoC designs. With an emphasis on productivity and value, Legend’s library characterization toolset, CharFlo-Memory! for memory IP and CharFlo-Cell! for standard cell and I/O library,  revolutionize the time-consuming and error-prone processes associated with characterization.
MSIM is Legend’s high-accuracy SPICE circuit simulator with fast speed and great convergence. Turbo-MSIM is Legend’s full-chip Fast-Spice simulator ideal for timing and power simulation, and mixed-signal circuit verification. Both simulators are well designed for advanced nanometer technology and excellent price performance. For more information, visit www.LegendDesign.com.