Legend Design releases multiprocessing circuit simulation manager for speeding DFM performance verification

SANTA CLARA, Calif., September 20, 2005 – Legend Design Technology, Inc. today announced that CharFlo-MonteCarlo! as a simulation manager for multiprocessing statistical circuit simulation has been released and bundled with MSIM API (Application Program Interface) circuit simulators for price-performance. The CharFlo-MonteCarlo! is a software program managing concurrent circuit simulations, statistical input controls and result analysis, and time-sharing computer resources for efficiency. The MSIM API is a circuit simulation engine with excellent accuracy, speed and convergence.
 
Design-for-manufacturing (DFM) is normally divided into three areas: layout, performance and production verification. Through statistical models and simulations, the DFM performance verification can examine the circuit performance under various physical impacts. Since the process parameters in manufacturing are statistically distributed, the corresponding statistical Spice models need be derived for running circuit simulations and reflecting die-to-die and wafer-to-wafer variations. Legend’s CharFlo-MonteCarlo! bundled with MSIM API will support statistical Spice models from major foundries,  including TSMC and UMC.
 
For nanometer designs, the simulation results using conventional corner Spice models (typical, fast and slow corners) will be overly pessimistic. Therefore, the statistical Spice models need be adopted for obtaining the simulation results that can reflect actual silicon in manufacturing. Furthermore, the statistical simulation can accurately predict the circuit behavior (e.g. cross-coupling and simultaneously switching noise) for analog and mixed-signal designs. With excellent price-performance, designers can use CharFlo-MonteCarlo! bundled with multiple MSIM API simulators to examine the impacts of statistical Spice models and to enhance their designs for yields.
 
Limitations of Conventional Approach
 
Conventionally, the corner Spice models (e.g. typical, fast and slow corners) based upon 3-sigma limits of parameters are used for simulating the circuits to guarantee the yields. Since the count of corner models is few, the number of circuit simulation jobs to be performed is normally limited. However, in statistical Spice model, there could be quite a few statistical modeling parameters such as ten (10) or even more. To ensure the reasonable simulation results, a large number of sampling points (e.g. hundreds or thousands) covering all distributed modeling parameters are normally required. The amount of corresponding circuit simulation jobs could be huge, and become prohibitive especially for sizable circuits and large samplings.
 
When running statistical simulation by using ‘standalone’ circuit simulator, a large number of simulation jobs corresponding to sampling points are ‘sequentially’ executed. It is because there is no simulation manager for distributing those jobs to computer farm. The whole process of statistical simulation will take prohibitively long. Even worse, the long-running simulation could be suddenly interrupted by system and network problem. Since it cannot be recovered, all simulation efforts and computer resources could be wasted.
 
Another key issue is the solution cost. If those huge number of simulation jobs can be concurrently distributed to a computer farm, there is still a need to have a good number of circuit simulators available. The cost of those circuit simulators could be prohibitive, too. Therefore, conventional approach for running statistical circuit simulation is only feasible for smaller circuits and fewer sampling points.
 
Benefits of Legend’s New Solution
 
The CharFlo-MonteCarlo! bundled with MSIM API is the total solution for running statistical circuit simulation. CharFlo-MonteCarlo! enables the multiprocessing of those large number of simulation jobs corresponding to sampling points, and distributes them to a computer farm. With limited access rights within CharFlo-MonteCarlo!, MSIM API as a circuit simulation engine can be provided at a much lower cost. Especially, Legend’s solution is feasible and affordable for sizable circuits and large number of samplings.
 
Depending upon the job size, the statistical simulation may run for days in computer farm. CharFlo-MonteCarlo! enables running and re-running those simulation jobs when computer resources are available, and pausing when there are other higher-priority jobs jumping in. The functions of ‘pause’ and ‘re-run’ are very critical for managing simulation resources and recovering from system and network failures. By maintaining database of all simulation controls and results, Charflo-MonteCarlo! has provided the ‘pause’ and ‘re-run’ capabilities for efficiency and productivity. In addition, the input controls, circuit and model parameters can be flexibly specified, and the simulation results intelligently analyzed by providing statistical measurements and histograms etc.
 
CharFlo-MonteCarlo! bundled with MSIM (API) circuit simulator is available now, starting at $20,000 for a perpetual license.
 
About Legend
Legend Design Technology Inc. is a leading provider of circuit simulation and semiconductor IP characterization software for SoC designs. With an emphasis on productivity and value, Legend’s CharFlo-Memory! toolset revolutionizes the time-consuming and error-prone processes associated with characterization. MSIM is Legend’s high-accuracy SPICE circuit simulator with great convergence and extensive model support. Turbo-MSIM is Legend’s high-speed and high-capacity circuit simulator ideal for timing and power simulation, and function verification. Both simulators are well designed for nanometer technology challenges, and provide excellent price performance. For more information, visit www.LegendDesign.com.


   

Contact Legend Design Technology, Inc.

Fill out this form for contacting a Legend Design Technology, Inc. representative.

Your E-mail address:
Write your message:
   

 



E-mail This Article Printer-Friendly Page



list: -1127952005.45 seconds
detail: 0.000362157821655 seconds
prov: 0.000550031661987 seconds
end_new

Sponsor Links
D&R DSP on FPGA Corner
This section explores if technology-optimized DSP IP or technology-independent IP generated/optimized by DSP Synthesis can meet the design requirements when mapped onto an FPGA
CoWare
Read CoWare's Transaction Level Models In SystemC White Paper
Verification IP Corner
With increasing design complexity, large number of in-house and third-parties IPs, and limited resources design verification represents a bottleneck in product development process
Structured ASIC Corner
Structured ASICs are a new breed of custom device that approach the performance of today's Standard Cell ASIC while dramatically simplifying the design complexity



Home | Feedback | Register | Site Map

All material on this site Copyright 2003 Design And Reuse S.A. All rights reserved.