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Tower Semiconductor adopts Legend’s CharFlo-Memory! for quality assurance of commercially available memory compilers

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SANTA CLARA, Calif., --December 15, 2003 - Legend Design Technology, Inc. today announced that semiconductor foundry Tower Semiconductor (NASDAQ: TSEM; TASE: TSEM) has adopted CharFlo-Memory! to implement a quality assurance (QA) methodology for commercially available memory compilers. Based upon layout-extracted circuit data with resistors and capacitors, Legend’s CharFlo-Memory! toolset has the capacity to generate accurate on-chip memory instance models at any PVT (process, voltage and temperature) corner. The results enable Tower to offer its clients the highest quality product possible.

“System-on-chip (SoC) designs are becoming increasingly memory dominant as silicon technology rapidly moves to deep sub-micron and nanometer levels. Tower Semiconductor has put in place a memory quality assurance (QA) flow that minimizes the growing gap between the foundry and IP provider, and enables our customers to achieve time-to-market goals for their SOC designs. We have successfully used Legend tools to QA our wide portfolio of memory compilers from leading IP vendors. Tower Semiconductor uses Legend’s memory characterization tool, CharFlo-Memory!, to efficiently produce memory models that reflect the reality of the silicon.  We are dedicated to the overall quality of our design services and the means to achieve the highest levels of customer satisfaction," said Sergio Kusevitzky, vice president of design services and IP at Tower Semiconductor.

“For the ‘what-if’ analysis on any PVT (process, voltage and temperature) corner, Legend’s CharFlo-Memory! has automated the characterization task and accomplished it accurately and  efficiently. Tower Semiconductor now has the means to easily verify the impact that a process change might have on memory IP function.
In addition, Legend’s high-accuracy circuit simulator MSIM, which is seamlessly integrated with CharFlo-Memory!, has provided excellent performance and results,” added Kusevitzky.

"Quality and reliability of embedded memory is essential for silicon success of deep-submicron and nanometer SOC designs," said You-Pang Wei, president and chief executive officer of Legend Design Technology. "With the adoption of Legend’s Charflo-Memory!, Tower has acquired the leading-edge solution for memory IP quality assurance and verification. We’re pleased to be working closely with Tower in meeting their needs for supporting their clients’ state-of-the-art SOC designs.”

About Legend Design Technology, Inc.
Legend Design Technology, Inc. is a leading provider of characterization and simulation software for semiconductor Intellectual Property (IP) in SoC designs. With an emphasis on productivity and value, Legend’s CharFlo-Memory! toolset which includes MSL, SpiceCut, MemChar and MSIM, efficiently and accurately automate the time consuming and error prone processes associated with characterization. SpiceCut automatically builds critical-path circuits to reduce simulation time for characterization, especially from post-layout extracted circuits with resistors and capacitors. MemChar automatically characterizes the memories and generates the ‘true’ timing and power models. MSL automates memory characterization with customized setup of '.Lib-in and .Lib out'. MSIM is a highly accurate characterization-oriented circuit simulator with post-layout RC reduction capacity. For more information, visit http://www.us.design-reuse.com/exit?url=http://www.LegendDesign.com

 
About Tower Semiconductor, Ltd.
Tower Semiconductor Ltd. is a pure-play independent wafer foundry established in 1993. The company manufactures integrated circuits with geometries ranging from 1.0 to 0.18 microns; it also provides complementary manufacturing services and design support. In addition to digital CMOS process technology, Tower offers advanced non-volatile memory solutions, mixed-signal and CMOS image-sensor technologies. To provide world-class customer service, the company maintains two manufacturing facilities. Fab 1 has process technologies from 1.0 to 0.35 microns and can produce up to 16,000 150mm wafers per month. Fab 2 features 0.18-micron and below process technologies, including foundry-standard technology, and will offer full production capacity of 33,000 200mm wafers per month. The Tower Web site is located at
http://www.us.design-reuse.com/exit?url=http://www.towersemi.com.




   

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