May 10, 2004
-- Legend Design Technology, Inc. has announced that the
CharFlo-Memory! software has been extended to CharFlo-Memory!-TD for
semiconductor process optimization, verification, and statistical
characterization. The purpose is to enhance the productivity and yields
of process development for deep-submicron and nanometer technology.
Legend’s methods and apparatuses there have been patent-pending.
process verification, CharFlo-Memory!-TD provides electrical
measurements of timing, power, maximum frequency, and the reliability
etc. After process parameters converted to SPICE models,
CharFlo-Memory!-TD with MSIM circuit simulator can verify the impact of
any process change quickly and accurately.
a pseudo-DOE (Design of Experiments) tool, CharFlo-Memory!-TD performs
process optimization by characterizing and simulating the test circuits
over the combinations of process parameters. The sweet spots can then
be located with the results correlated with silicon measurement.
for statistical characterization, CharFlo-Memory!-TD inputs statistical
SPICE models reflecting the distributions of process parameters, and
then produces the statistical results of electrical measurements from
characterization and simulation. Analyzing the distribution of those
statistical results such as sense-amplifier input (reliability) against
noise margin always help predicting the yields.
Lin, Chief SOC Architect at UMC, commented, "For the ‘what-if’ analysis
on any PVT corner, Legend’s CharFlo-Memory! has automated the
characterization task and accomplished it accurately and efficiently.
UMC now has the means to easily verify the impact a process change
might have on memory IP function and reliability."
memory characterization tool has been well proven not only in
characterizing designs, but also in enhancing the productivity and
yields of process development, especially for deep-submicron and
nanometer technology." said Dr. You-Pang Wei, president and chief
executive officer of Legend Design Technology.