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LEGEND DESIGN TECHNOLOGY - Company Highlights - Memory Characterization and Circuit Simulation

Company Highlights

Legend Design Technology, Inc. was founded in October 1996. The company's core belief is that through innovation and dedication, we continually develop and provide leading edge solutions for characterization, simulation, and verification of semiconductor Intellectual Property (IP). Our EDA tools maximize engineering productivity, enabling SoC design teams to meet critical time-to-market targets - accurately and economically.

Legend is headquartered at Santa Clara, California with distributors in Japan, China, Korea and South East Asia. To forge strong ties with semiconductor foundries across the world, Legend has formed R&D and support teams in Taiwan.

Markets

For the characterization, simulation and verification of semiconductor IP, Legend's products address the quality and throughput needs of foundries, IP developers, IDMs and fabless design houses.

With regards to deep-submicron and nanometer designs, understanding the impact of second-order effects - signal integrity, leakage power, glitch and metastability - on IP performance is crucial. Legend's characterization and simulation products can completely analyze the effects to provide a total solution.

Products

Legend's EDA products and solutions include
  • Semiconductor IP Characterization
        - Memory Characterization Tools
          CharFlo-Memory!TM
        - Standard Cell/IO Characterization and Verification Tool
          CharFlo-Cell!TM
          Model DiagnoserTM
  • Circuit Simulations
        - High-Accuracy Circuit Simulator
          MSIM®
        - High-Speed and High Capacity Circuit Simulator
          Turbo-MSIMTM

    Financing

    Legend is a privately held company. The company's first-round funding (around $5 million) came from venture capitalists, and several highly regarded professionals in the semiconductor and electronic design automation (EDA) industries.

    Founder

    Dr. You-Pang Wei
    President & CEO

    Dr. Wei has over 20 years R & D and management experience in memory circuit design and simulation, timing analysis and layout. He has worked with AMD, Intel, Meta-Software, Performance CAD, and Mentor Graphics. At Meta-Software, Dr. Wei was the HSPICE chief architect and manager. He received a B.S. degree in electrical engineering from National Taiwan University, and a M.S. degree and Ph.D. degree in electrical engineering from University of Illinois at Urbana-Champaign.
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