HomeNewsletterAboutFeedbackContact UsMedia KitEET Network


NetSeminar Button

NeSeminar Services
A list of upcoming NetSeminars, plus a link to the archive.

Dramatically accelerate in-circuit validation of systems with FPGAs

Overcoming Noise in Data Acquisition - The 7 Deadly Sources, and Improving the Measurement Performance of Any System

Advanced Signal Source Measurements: Optimizing Stimulus to Achieve Desired System Performance

Catch the Buzz on ZigBee! Wireless Control that Simply Works!

EE Times' Future of Semiconductors NetSeminar Series

Archive


EETimes Design Library

eLibrary


Online Editions
EE TIMES
EE TIMES ASIA
EE TIMES CHINA
EE TIMES FRANCE
EE TIMES GERMANY
EE TIMES KOREA
EE TIMES TAIWAN
EE TIMES UK

Web Sites
CommsDesign
iApplianceWeb.com
Microwave Engineering
EEdesign
Deepchip.com
Design & Reuse
Embedded.com
Embedded Edge
Magazine
Elektronik i Norden
Planet Analog
Silicon Strategies
The Work Circuit
Wireless Solutions
Magazine


Conferences and Events
Custom Magazines
EBN
EBN China
eeProductCenter
Electronics Express
NetSeminar Services
QuestLink



May 11, 2004


Legend offers process optimization tool

By Richard Goering
EE Times

May 10, 2004 (8:00 PM EDT)

SANTA CRUZ, Calif. — Extending its CharFlo_Memory! characterization software to semiconductor process optimization, verification, and statistical characterization, Legend Design Technology has introduced CharFlo-Memory!-TD. The extended product aims to enhance productivity and yields for nanometer ICs.

For process verification, CharFlo-Memory!-TD provides electrical measurements of timing, power, frequency, and reliability. After process parameters are converted to Spice models, designers can use Legend's MSIM circuit simulator to verify the impact of any process change.

As a pseudo "design of experiments" tool, CharFlo-Memory!-TD optimizes processes by characterizing and simulating test circuits over a combination of process parameters. For statistical characterization, it takes in Spice models that reflect the distributions of process parameters, and then produces statistical results of electrical measurements from characterization and simulation.

You-Pang Wei, Legend president and CEO, said that CharFlo-Memory! has been adopted by major foundries, IDMs, and fabless design houses. He named TSMC and UMC as customers. The extended product complements costly "design of experiments" done on silicon, he said.

CharFlo-Memory!-TD is available now from Legend Design, starting at $250,000 for a perpetual license.

Latest Headlines
News
  • System EDA firm raises $3 million for expansion
  • Tharas spins new accelerator box
  • Behavioral synthesis revived for ESL design
  • CoWare joins another UWB group
  • Synplicity adds DSP synthesis to Synplify lineup
  • Static timing tool serves FPGAs

    Archives

    Free Subscription to EE Times
    First Name Last Name
    Company Name Title
    Business Address City
    State

    Zip
    Email address

    Get Up to Speed with eeProductCenter
    eeProductCenter reports on the very latest IC and components to hit the streets. Our editors break product information firsthelping you make design decisions faster. To visit, click here.
    Silicon Strategies Adds New Features
    Since 1997, Silicon Strategies has been the leading 24/7 news site for the semiconductor industry, focused on breaking the latest news and delivering expert analysis and commentary on major events for semiconductor professionals. Recently we've added a number of new weekly features on foundries, DRAM analysis, a weekly recap and a daily email newsletter. Click here for more.
    An Industry Agenda
    "The future ain't what it used to be," Yogi Berra once quipped. He could have been referring to today's semiconductor industry, writes editorial director Richard Wallace in "The Future of Semiconductors." In this special issue, the editors of EE Times create a blueprint for the industry with their analysis of key technology, business and geopolitical realities. Register for the related Editorial NetSeminar series which begins later this month.

    Free Effective Microprocessor Benchmarking Webinar
    Learn about EEMBC benchmarking to find the best microprocessor for your embedded design. Discover its benefits over other benchmarks such as Dhrystone. Understand processor selection through real-world case study. PMC-Sierra Technology Series.

    Free SoC, IP, and ASIC & FPGA design information
    News, articles, tutorials, whitepapers, directories for EDA tools, IP, ASIC, system-on-chip and FPGA design from selected online sources. No registration required at SOCcentral.com.

    Locate hard to find, obsolete and long lead time electronic
    Specializes in locating obsolete or short supply electronic parts and components. Visit our website today and do a free part search.

    Free technical paper: Top 10 Reasons for Using Ultracapacitors in Your System Design
    FREE Paper! Discover 10 ways that Maxwell's ultracapacitors give system designers more freedom by allowing hybrid power system solutions that cost less and perform better than non-hybrid solutions.

    Free Membrane Switch Design Guide
    Pannam Imaging with its ISO 9001 certification is the recognized leader in the design and manufacture of custom membrane switches. Our ISO systems assure the highest quality design and manufacturing as well as the best value

    Buy a link NOW:

    Home | Register | About | Feedback | Contact
    Copyright 2004 CMP Media, LLC
    Terms and Conditions | Privacy Statement