The Spice circuit simulator, for instance, is 30 years old now, a bit matronly as EDA tools go. But if you need to look at the way in which voltage or current rises and falls from a node over time, this is your main tool. The good news, thanks to fast processors and streamlined operating systems, is that it's also become quite peppy, and that peppiness allows you to perform some very complex analyses.

At DAC, OrCAD Systems, under the Cadence Design Systems umbrella, will be showing a new version of PSpice, one that takes PC-based circuit optimization and Monte Carlo to new extremes. The Advanced Analysis option, called PSpice AA, allows designers to identify component values and tolerances on which the system performance will hinge. This could be used, for example, to reduce costs by using sloppy-tolerance passive components in filter loops, which the optimizer says have limited sensitivity. But, like Monte Carlo, this optimization technique depends on a statistical profile drawn from repeated simulation runs-something that could not happen unless Spice ran very fast.

Memory cells, if you can get your mind around this, use analog transistors to raise and store a charge-as well as for row and column drivers. This fact has enabled Legend Design to build a Spice-based memory characterization tool for embedded memories. The MemChar tool set automatically generates the stimulus vectors, extracts parasitic and critical timing path information from a memory layout, and builds a timing and power model for the block. To generate parametric models, the characterization needs a large number of simulation runs.

The Spice replacement market is still only a $200-$300 million opportunity for analog tool developers. There is probably more money to be made in showing people how to use Spice, which is why analog synthesis companies are renting out their design teams.