EDTN Network     June 29, 2001

The Technology Site for Engineers and Technical Management

  arrow Home : Columns : Mixed Signals

6/25, 6:12 pm EST

News Channels
Systems & Software
Design Automation

In Focus
Special Reports
Immortal Works

  Ask the Headhunter
Salary Survey
The Work Circuit
Mentoring Board

Conference Coverage
Regional Seminars
On-line Seminars

  Product of the Week
Focus on

EDTN Network
  EDTN Home
EDTN e-cyclopedia
Broadcast News
Planet Analog

EETimes Info
  Editorial Contacts
Sales Contacts
Media Kit
Reader Service
e-Sources Directory
Custom Supplements

Click here!

Click here!
Network Partners

 Privacy Statement

Click here!

Mixed Signals

Spiced-up tools characterize analog EDA

By Stephan Ohr
EE Times
(06/18/01, 1:35 p.m. EST)

Semiconductors News

  Business shifts favor standard linear
  Analog guys take the heat at Intel forum
  This 'engineer's tea' draws thousands
  Acquisition fever cools, analog stays hot

Stephan OhrOn the eve of the annual Design Automation Conference (DAC), analog EDA looks very much the same as it did last year. Everyone still uses some form of Spice as their main circuit simulator. Analog synthesis-quite a buzz word-is really still in its infancy. And if you want to use some company's analog intellectual property, it really means you want to hire their design team to help you. But there are some colorful and interesting twists to otherwise familiar things.

The Spice circuit simulator, for instance, is 30 years old now, a bit matronly as EDA tools go. But if you need to look at the way in which voltage or current rises and falls from a node over time, this is your main tool. The good news, thanks to fast processors and streamlined operating systems, is that it's also become quite peppy, and that peppiness allows you to perform some very complex analyses.

At DAC, OrCAD Systems, under the Cadence Design Systems umbrella, will be showing a new version of PSpice, one that takes PC-based circuit optimization and Monte Carlo to new extremes. The Advanced Analysis option, called PSpice AA, allows designers to identify component values and tolerances on which the system performance will hinge. This could be used, for example, to reduce costs by using sloppy-tolerance passive components in filter loops, which the optimizer says have limited sensitivity. But, like Monte Carlo, this optimization technique depends on a statistical profile drawn from repeated simulation runs-something that could not happen unless Spice ran very fast.

Memory cells, if you can get your mind around this, use analog transistors to raise and store a charge-as well as for row and column drivers. This fact has enabled Legend Design to build a Spice-based memory characterization tool for embedded memories. The MemChar tool set automatically generates the stimulus vectors, extracts parasitic and critical timing path information from a memory layout, and builds a timing and power model for the block. To generate parametric models, the characterization needs a large number of simulation runs.

The Spice replacement market is still only a $200-$300 million opportunity for analog tool developers. There is probably more money to be made in showing people how to use Spice, which is why analog synthesis companies are renting out their design teams.

Search EET's
Web Site

To view past "Mixed Signals" columns

To view other columns

Sponsor Links
Texas Instruments
Register today for FREE Online Training on TI's C64x and C55x DSPs

Free Technical Whitepaper on Verification IP - Get It Now!

Numerical Technologies
The subwavelength gap is real. Get the facts here on 70-nm production.

Comms Designers Unite!
Focus on CommsDesign.com for all the latest industry news and product information.

Click here!

All material on this site Copyright 2001 CMP Media LLC. All rights reserved.
red line


Semiconductor Business News