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Legend Design Technology - Memory Characterization and Spice Simulation news
News and Events
A look at what industry is saying about Legend ...
- EETimes (May 28, 2008)
"Characterization/verification tools improve reliability in SoC designs"
- Business Wire/Design & Reuse
(May 27, 2008)
"Total solution for standard cell & I/O library, and memory IP characterization by Legend's tools"
- EETimes (May 22, 2008)
"Spice circuit simulator runs faster"
- Business Wire/Design & Reuse
(May 21, 2008)
"MSIM Simulator with 5X~10X Speedup for Characterizing CCS Timing Model of Cell Library"
- Business Wire/Design & Reuse
(May 29, 2007)
"Legend releases Turbo-MSIM Fast-SPICE Simulator for Verification, Analysis and Characterization in SoC Design"
- EETimes (May 22, 2007)
"Characterization supports 45nm memories"
- Business Wire/Design & Reuse
(May 21, 2007)
"Memory IP Characterization for 45nm Technology and Below"
- Business Wire/Design & Reuse
(May 7, 2007)
"Dongbu HiTek adopts Legend's Memory Characterization Tools for Quality Timing and Power Models"
- Design & Reuse (July 13, 2006)
"DFM Parametric Yield Models for Memory IPs"
- EETimes (July 12, 2006)
"Tool promises characterization of yield models for memory IP"
- EETimes/Design & Reuse
(April 28, 2006)
"Circuit simulator optimized for sub-circuit type Spice models"
- Business Wire/Design & Reuse
(Jan 09, 2006)
"LSI Logic Validates Embedded Memory with Legend Design CharFlo-Memory! Tools"
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