|
|
|
The .Lib model of standard I/O cell library may be incorrectly characterized, or inappropriately
applied at new PVTs, or inconsistently modeled by the FUNCTION statement.
Model diagnoser enables
Assuring the quality of characterization and .Lib model
Repairing the defect of .Lib model by automatic adjust margins
|
|
|
Features
Latch/Flip-Flop Function and Timing Check
-Verify setup/hold time & min pulse width in .Lib model
-Automatic cell function acquisition
-Detect Function/Glitch/Meta-stability violations
Non-latch/Non-flip-flip
-Verify FUNCTION, specification in .Lib, and circuits
-Detect Function/Timing/Tri-state violations
Repair .Lib model of latch/flip-flop to prevent from
Function/Timing violations by adding margins
Processes
Function and Timing Check
Analyze the circuit of each cell by Legend's SpiceCut tool,
and locate high-risk spots inside the cell
Build state patterns based on FUNCTION and conditions.
If no such state pattern, then report the problems
Set up the corresponding stimulus for each setup/hold
time, and minimum pulse width
Simulate the cell by applying setup/hold time, and
min pulse width from .Lib model, with the stimulus built
Verify the simulation results for locating functional
violations and signal integrity issues such as glitches
Repair .Lib Model
For setup/hold time & min pulse width in .Lib model,
the margin shall be automatically adjusted to ensure
-No Function violations
-No Glitch violation inside the cell
-No Meta-Stability violation inside the cell
The margin increment can be by values or by percent
The margin adjustment for tabular setup/hold time can be
determined by the worst corner, by four extreme corners
and the central, or by all entries of that table
Simulate the cell by applying setup/hold time, and
min pulse width from .Lib model, with the stimulus built
Verify the simulation results for locating functional
violations and signal integrity issues such as glitches
Benefits
Enable quality assurances of cell library .Lib models for
the associated SoC designs
Quickly locate the function and timing problems in .Lib
model of the cell library at any PVT
Repair .Lib model for latch/flip-flop to prevent from
function and timing violations by automatically adjusting
the margins
Easy to use with programmable controls
Fully automated for production flow
Platform Support
Linux
Simulators Support
MSIM
HSPICE
|
|
