MemCharTM
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The memory characterization tool with optimizing and reliability checking.
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Click here for MemChar brochure.
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The Need
IC designs are becoming more memory dominant. To integrate memory,
logic and function blocks onto a single chip, accurate timing and power models of
embedded memory must be characterized for system-level simulation and verification.
Due to sophisticated design, constant changes in process models
and complicated integration, embedded memory needs to be validated through
characterization.
The Characterization Flow
Features of MemChar
- Generate the simulation stimulus and controls for all timing and power parameters
- control the creation of numerous Spice netlists along with the necessary measurement statements
through running SpiceCut
- Manage operations such as sweep loops for timing tables and optimization
- Allow users to specify preferred circuit simulator
- Perform reliability checking - including glitch prevention and design margin checking
Circuit Simulator Compatibility
- MSIM®
- HSPICETM
- TimeMillTM
- PowerMillTM
- StarSimTM
- HSIMTM
- EldoTM
- SmartSpiceTM
- Several other in-house circuit simulators, including advanced
modelling support such as BSIM4.
The Intelligence and Reliability Checking
As IC designs are getting more complicated, the 'Timing Soft Error' problem becomes critical
with impacts on both reliability and performance, especially for memory designs. The
'Hard Error' causes hard failure, which is easy to observe on pins. However, the
'Timing Soft Error' caused by racing and glitches etc. is embedded internally. It is
extremely difficult to debug the error. Legend's tools, MemCharTM and SpiceCutTM,
can help to prevent and debug 'Timing Soft Error' problems.
Complete Characterization Solution
- 'Bi-Section' Mode
- Setup and Hold time from binary iterations
- Glitches and racing prevention
- Accurate and Automated
- 'Path' Mode
- Setup and Hold time from paths' difference
- Automated by latch pattern recognition
The Example of Results
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| Access Time of doa[0] vs clka |
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0.2ns |
0.6ns |
1.4ns |
3.0ns |
4.0ns |
| 0.0pf |
7.914E-10 |
8.329E-10 |
8.596E-10 |
8.607E-10 |
8.489E-10 |
| 0.2pf |
9.991E-10 |
1.041E-10 |
1.067E-10 |
1.067E-10 |
1.055E-10 |
| 0.4pf |
1.195E-09 |
1.236E-09 |
1.263E-09 |
1.263E-09 |
1.249E-09 |
| 0.6pf |
1.390E-09 |
1.431E-09 |
1.458E-09 |
1.459E-09 |
1.446E-09 |
| 1.0pf |
1.794E-09 |
1.828E-09 |
1.862E-09 |
1.863E-09 |
1.845E-09 |
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| Setup Time of ada[4] vs clka |
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0.2ns |
0.6ns |
1.4ns |
3.0ns |
4.0ns |
| 0.2ns |
1.367E-10 |
1.360E-10 |
9.624E-11 |
-1.451E-11 |
-8.402E-11 |
| 0.6ns |
9.790E-11 |
9.842E-11 |
6.581E-11 |
-5.408E-11 |
-1.331E-10 |
| 1.4ns |
6.940E-11 |
7.045E-11 |
3.114E-11 |
-6.656E-11 |
-1.588E-10 |
| 3.0ns |
6.908E-11 |
6.792E-11 |
3.665E-11 |
-6.700E-11 |
-1.621E-11 |
| 4.0ns |
8.287E-11 |
8.015E-11 |
5.181E-11 |
-5.866E-11 |
-1.322E-10 |
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| Hold Time of ada[4] vs clka |
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0.2ns |
0.6ns |
1.4ns |
3.0ns |
4.0ns |
| 0.2ns |
1.210E-10 |
-2.002E-10 |
-3.370E-10 |
-5.916E-10 |
-7.368E-10 |
| 0.6ns |
-7.910E-11 |
-1.607E-10 |
-2.963E-10 |
-5.378E-10 |
-6.739E-10 |
| 1.4ns |
-5.269E-11 |
-1.319E-10 |
-2.686E-10 |
-5.233E-10 |
-6.651E-10 |
| 3.0ns |
-4.81E-11 |
-1.288E-10 |
-2.676E-10 |
-5.176E-10 |
-6.565E-10 |
| 4.0ns |
-6.067E-11 |
-1.430E-10 |
-2.847E-10 |
-5.185E-10 |
-6.720E-10 |
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